阅读:1317回复:11
请问saa7146h的音频编程
win2k Kernel streaming minidriver
怎么启动saa7146的音频dma啊,做过的兄弟们帮一把呀! :D :D 我现在这样做的: //initialize SetReg(MC1, 0x02000200); // Enable Audio Pins SetReg(ACON1, 0x3fc05000); // setup WS SetReg(ACON2, 0x28000000); // setup bt clk SetReg(PCI_BT_A, 0x13131313); // burst = threshold SetReg(A_TIME_SLOT1, 0x01800000); // time slot SetReg(A_TIME_SLOT1+0x04, 0x01800000); // time slot SetReg(A_TIME_SLOT1+0x08, 0x01000000); // time slot SetReg(A_TIME_SLOT1+0x0c, 0x01000000); // time slot SetReg(A_TIME_SLOT1+0x10, 0x41800000); // time slot SetReg(A_TIME_SLOT1+0x14, 0x41800000); // time slot SetReg(A_TIME_SLOT1+0x18, 0x41000000); // time slot SetReg(A_TIME_SLOT1+0x1c, 0x41200001); // time slot //set dma regs RegisterIsr(0x00002000, AudioIsr); ULONG ulPhyAddr = pSrb->ScatterGatherBuffer->PhysicalAddress.LowPart; SetReg(CSpciIo::BASE_A1_IN, ulPhyAddr); SetReg(CSpciIo::PROT_A1_IN, ulPhyAddr+m_ulBufferSize); SetReg(CSpciIo::PAGE_A1_IN, 0); //Start! SetReg(CSpciIo::MC1, 0x00010001); 可是ws1脚没有时钟输出,dma也没有进行,哪里错了啊 |
|
沙发#
发布于:2003-01-03 17:49
这里也有一段电码,供大家参考:
ULONG acon1,acon2,tsl0,tsl1,tsl2,tsl3; acon1 = 0x20044444; /*ACON1: 20044444. /* A1 active process time slot 1 wsx sync = i2s, and wsx ctrl is set to OUTPUT */ acon2 = 0x39c00000; /* ACON2: 39c00000.*/ /* A1_clksrc = aclk/8 A2_clksrc = aclk/8 bclk1, bclk2 normal polarity bclk1,bclk2 output enable */ 0x60*4: f8c80000 0x61*4: f8ca0000 0x62*4: 00cc0000 0x63*4: 00ee0001 0x70*4: 00000001 */ tsl0 = 0xf8c80000; tsl1 = 0xf8ca0000; tsl2 = 0x00cc0000; tsl3 = 0x00ee0001; WriteReg(SAA7146_ACON1,acon1); WriteReg(SAA7146_ACON2,acon2); WriteReg(SAA7146_A_TIME_SLOT1,tsl0); WriteReg(SAA7146_A_TIME_SLOT1+4,tsl1); WriteReg(SAA7146_A_TIME_SLOT1+8,tsl2); WriteReg(SAA7146_A_TIME_SLOT1+12,tsl3); 我用10moons的卡调试通过。 |
|
板凳#
发布于:2003-01-03 17:27
这么巧,我也在做7146卡的声音采集驱动。现在遇到和楼主以前一样的问题。我的板上的BCLK(由7146输出是2.8M),LRCK由7146的WS4输出(但好像没有输出时钟,不知为何???)。
我是这样设置的。 /* enable audio port */ saa7146_write(MC1, (MASK_09 | MASK_25)); saa7146_write(ACON1, 0x3fc00004); saa7146_write(ACON2, 0x28000000);//ACLK divided-by-4 saa7146_write(A_TIME_SLOT1, 0x00800000); saa7146_write(A_TIME_SLOT1+0x04, 0x00800000); saa7146_write(A_TIME_SLOT1+0x08, 0x00000000); saa7146_write(A_TIME_SLOT1+0x0c, 0x00000000); saa7146_write(A_TIME_SLOT1+0x10, 0x08800000); saa7146_write(A_TIME_SLOT1+0x14, 0x08800000); saa7146_write(A_TIME_SLOT1+0x18, 0x08000000); saa7146_write(A_TIME_SLOT1+0x1c, 0x08200001); saa7146_write(PCI_BT_A, 0x0f000000); /* Audio 1 input DMA */ saa7146_write(BASE_A1_IN,AudioBuf0Phy); saa7146_write(PROT_A1_IN,AudioBuf0Phy+4L*1024L); saa7146_write(PAGE_A1_IN, 0x00000008); regdata = saa7146_read ( IER ); regdata |= 0x0000f000; saa7146_write ( IER, regdata); saa7146_write(MC1, (MASK_00 | MASK_16)); 请楼主帮忙看看。万分感谢!!!!!! 还有Audio DMA1好像没工作????????? |
|
地板#
发布于:2003-01-03 16:45
能否给小弟留个EMAIL? 有问题就在这里问吧,也好给别人作参考 |
|
地下室#
发布于:2003-01-03 16:15
谢谢楼主!!!
能否给小弟留个EMAIL? |
|
5楼#
发布于:2003-01-03 14:31
bclk频率多少?如果是20bits的音频,那么一个lrclk周期中将会有至少6个字节的数据(一般是8个),timeslot每一项对应一个字节的数据,因此你的timeslot应该有至少6(我的是8)项,无效数据应该用一项timeslot舍弃(参见楼顶的A_TIME_SLOT1+0x08和A_TIME_SLOT1+0x0c)。
|
|
6楼#
发布于:2003-01-03 13:58
我现在BCLK和LRCK(44k)信号都是由音频AD(20Bit,I2S)产生。
Write7146Reg(MC1, 0x02000200); // Enable Audio Pins Write7146Reg(ACON1, 0x3fc00000); Write7146Reg(ACON2, 0x00000000); Write7146Reg(PCI_BT_A, 0x13131313); 用的是SD4和WS4做输入: Write7146Reg(A_TIME_SLOT1, 0x00800000); // time slot Write7146Reg(A_TIME_SLOT1+0x04, 0x00800000); // time slot Write7146Reg(A_TIME_SLOT1+0x08, 0x00800000); // time slot Write7146Reg(A_TIME_SLOT1+0x0c, 0x00800000); // time slot Write7146Reg(A_TIME_SLOT1+0x10, 0x00a00001); // time slot Write7146Reg(BASE_A1_IN, AudioBufPhyAddr); Write7146Reg(ROT_A1_IN, AudioBufPhyAddr+4096); Write7146Reg(AGE_A1_IN, 0x00008); //Start! Write7146Reg(MC1, 0x00010001); DMA好像没有进行,不知道哪里出错了?烦请帮看一下,谢谢!!! BCLK和LRCK(44k)信号都正常。 |
|
7楼#
发布于:2003-01-03 13:57
我现在BCLK和LRCK(44k)信号都是由音频AD(20Bit,I2S)产生。
Write7146Reg(MC1, 0x02000200); // Enable Audio Pins Write7146Reg(ACON1, 0x3fc00000); Write7146Reg(ACON2, 0x00000000); Write7146Reg(PCI_BT_A, 0x13131313); 用的是SD4和WS4做输入: Write7146Reg(A_TIME_SLOT1, 0x00800000); // time slot Write7146Reg(A_TIME_SLOT1+0x04, 0x00800000); // time slot Write7146Reg(A_TIME_SLOT1+0x08, 0x00800000); // time slot Write7146Reg(A_TIME_SLOT1+0x0c, 0x00800000); // time slot Write7146Reg(A_TIME_SLOT1+0x10, 0x00a00001); // time slot Write7146Reg(BASE_A1_IN, AudioBufPhyAddr); Write7146Reg(ROT_A1_IN, AudioBufPhyAddr+4096); Write7146Reg(AGE_A1_IN, 0); //Start! Write7146Reg(MC1, 0x00010001); DMA好像没有进行,不知道哪里出错了?BCLK和LRCK(44k)信号都正常。 |
|
8楼#
发布于:2003-01-03 09:30
你的bit clock和LRCLK是谁发生的呢,如果由7146发生,则timeslot里应该输出lrclk(通过ws脚),如果由音频AD发生,则AX_CLKSRC应该为00或01
|
|
9楼#
发布于:2003-01-02 22:10
谢谢兄弟,这么快就给我回信。
我现在寄存器是这么设置的: Write7146Reg(MC1, 0x02000200); // Enable Audio Pins Write7146Reg(ACON1, 0x3fc00001); // setup WS4 out Write7146Reg(ACON2, 0x28000000); // setup clk 44k Write7146Reg(PCI_BT_A, 0x13131313); // burst = threshold //44k 20Bit Write7146Reg(A_TIME_SLOT1, 0x01800000); // time slot Write7146Reg(A_TIME_SLOT1+0x04, 0x01800000); // time slot Write7146Reg(A_TIME_SLOT1+0x08, 0x01800000); // time slot Write7146Reg(A_TIME_SLOT1+0x0c, 0x01800000); // time slot Write7146Reg(A_TIME_SLOT1+0x1c, 0x01a00001); // time slot Write7146Reg(BASE_A1_IN, AudioBufPhyAddr); Write7146Reg(ROT_A1_IN, AudioBufPhyAddr+BufferSize); Write7146Reg(AGE_A1_IN, 0); //Start! Write7146Reg(MC1, 0x00010001); DMA好像没有进行,不知道哪里出错了?烦请看一下,谢谢!!! |
|
10楼#
发布于:2003-01-02 21:40
通了,你遇到什么问题了呢?
|
|
11楼#
发布于:2003-01-02 21:26
请问你的saa7146卡的音频采集部分调通了吗?能否给些提醒?我现在也在调。谢谢!!!!
|
|