阅读:1842回复:0
CPUCS = ((CPUCS & ~bmCLKSPD) | bmCLKSPD1)
这里的(CPUCS&~bmCLKSPD)|bmCLKSPD1 是什么意思呢
请高手指教 void TD_Init(void) // Called once at startup { // set the CPU clock to 48MHz CPUCS = ((CPUCS & ~bmCLKSPD) | bmCLKSPD1) ; // set the slave FIFO interface to 48MHz IFCONFIG |= 0x40; // Registers which require a synchronization delay, see section 15.14 // FIFORESET FIFOPINPOLAR // INPKTEND OUTPKTEND // EPxBCH:L REVCTL // GPIFTCB3 GPIFTCB2 // GPIFTCB1 GPIFTCB0 // EPxFIFOPFH:L EPxAUTOINLENH:L // EPxFIFOCFG EPxGPIFFLGSEL // PINFLAGSxx EPxFIFOIRQ // EPxFIFOIE GPIFIRQ // GPIFIE GPIFADRH:L // UDMACRCH:L EPxGPIFTRIG // GPIFTRIG // Note: The pre-REVE EPxGPIFTCH/L register are affected, as well... // ...these have been replaced by GPIFTC[B3:B0] registers // default: all endpoints have their VALID bit set // default: TYPE1 = 1 and TYPE0 = 0 --> BULK // default: EP2 and EP4 DIR bits are 0 (OUT direction) // default: EP6 and EP8 DIR bits are 1 (IN direction) // default: EP2, EP4, EP6, and EP8 are double buffered // we are just using the default values, yes this is not necessary... EP1OUTCFG = 0xA0; EP1INCFG = 0xA0; SYNCDELAY; // see TRM section 15.14 EP2CFG = 0xA2; SYNCDELAY; EP4CFG = 0xA0; SYNCDELAY; EP6CFG = 0xE2; SYNCDELAY; EP8CFG = 0xE0; // out endpoints do not come up armed // since the defaults are double buffered we must write dummy byte counts twice SYNCDELAY; EP2BCL = 0x80; // arm EP2OUT by writing byte count w/skip. SYNCDELAY; EP2BCL = 0x80; SYNCDELAY; EP4BCL = 0x80; // arm EP4OUT by writing byte count w/skip. SYNCDELAY; EP4BCL = 0x80; // enable dual autopointer feature AUTOPTRSETUP |= 0x01; Rwuen = TRUE; // Enable remote-wakeup } |
|