本公司最新推出支持WINCE.NET/WINCE的ARM9开发平台

CPU是Samsung的S3C2410,内核是ARM920T,跑200多兆主频.
板上面有64MByte SDRAM,16MByte FlashROM(intel的),2个RS232串口,1个红外收发器(IRDA),2个USB HOST,1个USB Device,1个10M 以太口,1路数字音频输入口和1路数值音频输出口,1个SMC卡座,1个SD卡座,1个LCD扩展口(可外接STN,CSTN,TFT LCD),1个总线扩展口.
CPU内部的众多资源大家可以看2410的手册,太多了,懒得再写.
本公司网址：http://www.embedon.com
深圳市远峰计算机技术有限公司
开发平台的照片如下：
http://www.21icsearch.com/buzi/upimage/upfile/200363946140.jpg
有关CPU的相关简介如下：
SAMSUNG\'s S3C2410X01 16/32-bit RISC microprocessor is designed to provide a cost-effective, low power, small die size and high performance micro-controller solution for hand-held devices and general applications. To reduce total system cost, S3C2410X01 also provides the following : separate 16KB Instruction and 16KB Data Cache, MMU to handle virtual memory management, LCD controller(STN & TFT), NAND Flash Boot loader, System Manager(chip select logic, SDRAM controller), 3-ch UART with handshake, 4-ch DMA, 4-ch Timers with PWM, I/O Ports, RTC, 8- ch 10-bit ADC and Touch screen interface, IIC-BUS interface, IIS-BUS interface, USB Host, USB Device, SD Host & Multi-Media Card Interface, 2-ch ch SPI and PLL for clock generation.
The S3C2410X01 was developed using an ARM920T core, 0.18um CMOS standard cells and a memory complier. Its low-power, simple , elegant and fully static design is particularly suitable for cost-sensitive and power sensitive applications. Also S3C2410X01 adopts a new bus architecture, AMBA (Advanced Microcontroller Bus Architecture) An outstanding feature of the S3C2410X01 is its CPU core, a 16/32-bit ARM920T RISC processor designed by Advanced RISC Machines, Ltd. The ARM920T implements MMU, AMBA BUS, and Harvard cache architecture with separate 16KB instruction and 16KB data caches, each with a 8-word line length.
By providing complete set of common system peripherals, the S3C2410X01 minimizes overall system costs and eliminates the need to configure additional components. The integrated on-chip functions that are described in this document include:

1.8V internal, 1.8V/2.5V/3.3V memory, 3.3V external I/O microprocessor with 16KB I-Cache, 16KB D-Cache, and MMU.
External memory controller. (SDRAM Control, Chip Select logic)
LCD controller (up to 4K color STN and 64K color TFT) with 1-ch LCD-dedicated DMA.
4-ch DMAs with external request pins
3-ch UART with handshake(IrDA1.0, 16-byte FIFO) / 1-ch SPI
1-ch multi-master IIC-BUS/1-ch IIS-BUS controller
SD Host interface version 1.0 & Multi-Media Card Protocol version 2.11 compatible
2-port USB Host /1- port USB Device(ver 1.1)
4-ch PWM timers & 1-ch internal timer
Watch Dog Timer
117-bit general purpose I/O ports / 24-ch external interrupt source
Power control: Normal, Slow, Idle, Stop and Power-off mode
8-ch 10-bit ADC and Touch screen interface.
RTC with calendar function.
On-chip clock generator with PLL



[编辑 -  6/5/03 by  毛驴牛仔]