急！请教68013双向传输问题

做了一个68013与FPGA的通讯板，EP2为输入，EP8为输出。68013是用56脚封装的。
单独输入或输出都已经调试成功。
想把它做成双向的，现在有几个很困惑的问题：
1）选择EP2和EP8是通过FPGA来控制68013ADDR0和ADDR1实现的，能不能实现自动选择？就是说，我在上位机软件上不需要关心FPGA现在选通了哪个ENDPOINT，只要选择下载，就自动跳到EP2，选择上传，就自动跳到EP8？是不是利用FLAG来给FPGA信号，然后FPGA根据FLAG的值进行地址选择？如果是的话，如何设置固件呢？

2）当我们选择下载时，例如向EP2写入数据，是否不管此时ADDR选中的是不是EP2，数据都存入EP2？


说的有点乱，其实最关心的还是如何实现在上位软件控制下载还是上传？是怎么识别的？我用的是56脚的68013......
谢谢了！

如果你手上有开发板可以看一下bulkloop这个固件对应的上位机程序，我觉得这个程序对你应该有帮助。

USB协议你没有看吧

你说的双向是什么意思?
你直接调用WriteFile和ReadFile不就的了]
不过固件要做工作,
假定你在固件里有两个程序,不包括信道的建立和保持.通过参数就可以调用其中一个程序.看看老外的做法

#define MAX_DATA_SIZE        129 /* this is to make sure that response of READ_BLOCK plus the command status fit into 16 frames exactly */

/* System related commands */
#define CMD_OK                0  /* deprecated */
#undef  CMD_ERR_SUM              /* deprecated, USB has CRC16 in place */
#define CMD_FAILED            2  /* command execution failed (incorrect parameters, target not responding, etc.) */
#define CMD_UNKNOWN           3  /* unknown command */

/* TurboBdmLight related commands */
#undef  CMD_GET_DESC                 /* deprecated */
#undef  CMD_GET_SWSER                   /* deprecated */
#define CMD_GET_VER           12 /* returns 16 bit HW/SW version number, (major & minor revision in BCD in each byte - HW in MSB, SW in LSB; intel endianism) */
#define CMD_GET_LAST_STATUS   13 /* returns status of the previous command */

/* BDM related commands */
#define CMD_SET_TARGET        30 /* set target, 8bit parameter: 00=HC12/HCS12(default), 01=HCS08 */
#define CMD_CONNECT           31 /* try to connect to the target */
#undef  CMD_READ_SPEED           /* deprecated, speed has higher resolution now */
#define CMD_RESET             33 /* 8bit parameter: 0=reset to Special Mode, 1=reset to Normal mode */
#define CMD_GET_STATUS        34 /* returns 16bit status word: bit0 - ACKN, bit1 - target was reset (this bit is cleared after reading), bit2 - always 0, bit4-3 - comm status: 00=NOT CONNECTED, 01=SYNC, 10=GUESS, 11=USER SUPPLIED */
#define CMD_READ_BD           35 /* parameter: 16-bit address, returns 8-bit value read from address; on HCS08 it returns the 8-bit BDCSCR register, parameters are none */
#define CMD_WRITE_BD          36 /* parameter: 16-bit address, 8-bit value to write; on HCS08 it writes the BDCSCR register, parameter is only the 8-bit value to write */
#undef  CMD_GO                   /* deprecated */
#undef  CMD_STEP                 /* deprecated */
#define CMD_HALT              39 /* stop the CPU and bring it into background mode */
#define CMD_SET_SPEED         40 /* deprecated */
#define CMD_READ_SPEED1       41 /* read speed of the target: returns 16-bit tick count */
#define CMD_GO1               42 /* start code execution */
#define CMD_STEP1             44 /* perform single step */
#define CMD_SET_SPEED1        46 /* sets-up the BDM interface for a new bit rate & tries to enable ackn feature, parameter: 16-bit word = number of 16.6ns ticks per SYNC */

/* CPU related commands */
#define CMD_READ_8            50 /* parameter 16bit address, returns 8bit value read from address */
#define CMD_READ_16           51 /* parameter 16bit address, returns 16bit value read from address */
#undef  CMD_READ_BLOCK               /* deprecated */
#define CMD_READ_REGS         53 /* reads registers, returns 16bit values: HC/S12(X): PC, SP, IX, IY, D(B:A), CCR; HCS08: PC, SP, H:X, A, CCR; upper bytes are 0 when not used */
#undef  CMD_READ_BLOCK_FAST           /* deprecated */
#define CMD_READ_BLOCK1       55 /* parameter 16bit address, 8bit count of bytes to read, returns block of bytes from given address, count MUST be <=MAX_DATA_SIZE */

#define CMD_WRITE_8           60 /* parameter 16bit address, 8bit value to write */
#define CMD_WRITE_16          61 /* parameter 16bit address, 16bit value to write */
#undef  CMD_WRITE_BLOCK          /* deprecated */
#undef  CMD_WRITE_REGS           /* deprecated */
#undef  CMD_WRITE_BLOCK_FAST     /* deprecated */
#define CMD_WRITE_BLOCK1      65 /* parameters: 16bit address, 8bit count of bytes, block of bytes to write, size of data block can be up to MAX_DATA_SIZE */

/* HC12 CPU individual register write commands (added for debugger interfaces which need access to individial registers rather than whole block) */
#define CMD_WRITE_REG_PC      80 /* parameter: 16-bit PC value */
#define CMD_WRITE_REG_SP      81 /* parameter: 16-bit SP value */
#define CMD_WRITE_REG_X       82 /* parameter: 16-bit IX (H:X) value */
#define CMD_WRITE_REG_Y       83 /* parameter: 16-bit IY value */
#define CMD_WRITE_REG_D       84 /* parameter: 16-bit B:A (x:A) value */
#define CMD_WRITE_REG_CCR     85 /* parameter: 16-bit CCR (x:CCR) value */
支持这么多命令,用一个字节

谢谢大家的帮助！我已经解决了，不过我上次说的不太明白了，其实我更关心的是68013与FPGA怎么通信，我是这样实现的：
引出PA0脚给FPGA，写入EP2时，给PA0脉冲，这样就可以让FPGA区分是读写还是写了。

楼主可以留下联系方式吗?

我也正在弄这个东西
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怎么弄的，我的USB通过EP2OUT把数据传不到FPGA，不知道为什么。我QQ：317889998