用过ispExpert或ispLEVER的快来看看

使用ispExpert, 这是个宏的使用的例子。但是怎莫就是说找不到
Fatal Error 3500: Lower-level Module \'CBU28\' does not exist.

Done: failed with exit code: 0002.

原有信息如下

ispDesignEXPERT Auto-Make Log File
----------------------------------

Updating: Functional Simulation

Starting: \'C:\\ISPTOOLS\\ISPSYS\\BIN\\ahdl2blf.exe xcbu.abv -vec -ovec xcbu.tmv -sim component -def _AMDMACH_ _MACH_ _MACH2_ _MACH4_  -err automake.err -gui\'

AHDL2BLF  ABEL-HDL Processor
Copyright(C), 1992-2000, Lattice Semiconductor Corporation. All rights reserved
Portions Copyright(c), 1992-1999, Vantis Corporation
Portions Copyright(C), 1993-1998, Data I/O Corporation
Portions Copyright(C), 1997-1998, MINC Washington Corporation
Portions Copyright(C), Alan Phillips, Lancaster University Computer Centre 1992-1998

Done: completed successfully.

Starting: \'C:\\ISPTOOLS\\ISPSYS\\BIN\\Synpwrap.exe -e xcbu28 -target mach\'

Synplicity VHDL/Verilog HDL Synthesizer finished successfully


Done: completed successfully.

Starting: \'C:\\ISPTOOLS\\ISPSYS\\BIN\\edif2blf.exe -edf xcbu28.edi -out xcbu28.bl0 -err automake.err -log xcbu28.log -lib \"C:\\ISPTOOLS\\ISPSYS/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor\'

Starting EDIF2BLIF....

EDIF2BLIF: Warning: Net GND is floating and will be removed.
readEDIF ended normally.

Inspect circuit XCBU28
    Number of input ports   : 3
    Number of output ports  : 3
    Number of bidir ports   : 0
    Number of instances     : 28
    Number of nets          : 39

No design errors found in circuit XCBU28

WriteBLIF ended normally.

Done: completed successfully.

Starting: \'C:\\ISPTOOLS\\ISPSYS\\BIN\\mblifopt.exe xcbu28.bl0 -collapse none -reduce none -keepwires -gui -err automake.err -family\'

BLIFOPT  Open-ABEL Optimizer
U.C. Berkeley, SIS Ver. 1.0, supported by Lattice Semiconductor
ispDesignEXPERT 8.03 Copyright 1992-2001 Lattice Semiconductor. All Rights Reserved.
Note 0000:
BLIFOPT complete - Time 1 seconds


Done: completed successfully.

Starting: \'C:\\ISPTOOLS\\ISPSYS\\BIN\\mblflink.exe \"xcbu28.bl1\" -o \"component.bl2\" -omod \"component\" -gui -err \"automake.err\"\'

BLIFLINK  Top-Down Design Linker
ispDesignEXPERT 8.03 Copyright 1992-2001 Lattice Semiconductor. All Rights Reserved.
Fatal Error 3500: Lower-level Module \'CBU28\' does not exist.

Done: failed with exit code: 0002.

项目见附件

使用ispExpert, 这是个宏的使用的例子。但是怎莫就是说找不到
Fatal Error 3500: Lower-level Module \'CBU28\' does not exist.

Done: failed with exit code: 0002.

原有信息如下

ispDesignEXPERT Auto-Make Log File
----------------------------------

Updating: Functional Simulation

Starting: \'C:\\ISPTOOLS\\ISPSYS\\BIN\\ahdl2blf.exe xcbu.abv -vec -ovec xcbu.tmv -sim component -def _AMDMACH_ _MACH_ _MACH2_ _MACH4_  -err automake.err -gui\'

AHDL2BLF  ABEL-HDL Processor
Copyright(C), 1992-2000, Lattice Semiconductor Corporation. All rights reserved
Portions Copyright(c), 1992-1999, Vantis Corporation
Portions Copyright(C), 1993-1998, Data I/O Corporation
Portions Copyright(C), 1997-1998, MINC Washington Corporation
Portions Copyright(C), Alan Phillips, Lancaster University Computer Centre 1992-1998

Done: completed successfully.

Starting: \'C:\\ISPTOOLS\\ISPSYS\\BIN\\Synpwrap.exe -e xcbu28 -target mach\'

Synplicity VHDL/Verilog HDL Synthesizer finished successfully


Done: completed successfully.

Starting: \'C:\\ISPTOOLS\\ISPSYS\\BIN\\edif2blf.exe -edf xcbu28.edi -out xcbu28.bl0 -err automake.err -log xcbu28.log -lib \"C:\\ISPTOOLS\\ISPSYS/dat/mach.edn\" -net_Vcc VCC -net_GND GND -nbx -dse -tlw -cvt YES -xor\'

Starting EDIF2BLIF....

EDIF2BLIF: Warning: Net GND is floating and will be removed.
readEDIF ended normally.

Inspect circuit XCBU28
    Number of input ports   : 3
    Number of output ports  : 3
    Number of bidir ports   : 0
    Number of instances     : 28
    Number of nets          : 39

No design errors found in circuit XCBU28

WriteBLIF ended normally.

Done: completed successfully.

Starting: \'C:\\ISPTOOLS\\ISPSYS\\BIN\\mblifopt.exe xcbu28.bl0 -collapse none -reduce none -keepwires -gui -err automake.err -family\'

BLIFOPT  Open-ABEL Optimizer
U.C. Berkeley, SIS Ver. 1.0, supported by Lattice Semiconductor
ispDesignEXPERT 8.03 Copyright 1992-2001 Lattice Semiconductor. All Rights Reserved.
Note 0000:
BLIFOPT complete - Time 1 seconds


Done: completed successfully.

Starting: \'C:\\ISPTOOLS\\ISPSYS\\BIN\\mblflink.exe \"xcbu28.bl1\" -o \"component.bl2\" -omod \"component\" -gui -err \"automake.err\"\'

BLIFLINK  Top-Down Design Linker
ispDesignEXPERT 8.03 Copyright 1992-2001 Lattice Semiconductor. All Rights Reserved.
Fatal Error 3500: Lower-level Module \'CBU28\' does not exist.

Done: failed with exit code: 0002.

项目见附件
 

太简单啦， 不用宏啦

没有软件
看不成 :mad:

没有软件
看不成 :mad:

我再给你装一个