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[资料共享]SL811HS DVK的几个错误(Cypress技术支持)
Cypress Response Vinay Pandit | 08/03/2004 03:40 AM | Web
Hello JS, Thank you for using the Cypress On-Line ConnectionCenter?. In reference to your question(s): Q1: Some inconsistent contents with the Datasheet and EZ-811HS Specific Software Files. On Page 18 Table 6 DATA1_WR 's Value is 0x05 that should be 0x47 ZDATA0_WR 's Value is 0x47 which should be 0x05 (These two values are right in SL811 Demo Files ) All PID 's Value is inconsistent to the Datasheet and EZ-811HS Specific Software Files. (But these values are still wrong in SL811 Demo Files) I would like to get some acknowledgement from you. A1: First of all, the application note you are referring to was written a long time ago (as part of the old dev kit - SL811HS-DK). As you have noticed, this document does contain a few errors. Although, the document contains good information, there may be some mistakes throughout the document. Yes, you are correct, that DATA1_WR 0x05 should be 0x47 and ZDATA0_WR 0x47 should be 0x05. Q2:1: why write value 0x05 to register 05H (According to the Datasheet, Bit2 of register 05H is Reserved ?) A2:1: Again, we believe that bit2 had a meaning at one time, but as you have noticed, this bit is now reserved. So, unless you are operating as a slave (which it doesn't appear so) and using DMA, you don't need to worry about this bit. Now, assuming it is a host, where DMA is not even an option this bit is reserved and would normally be set to 0, but it does not really matter since it is reserved. Q2:2: why write value 0x0E to register 0EH in Low speed device and Full speed device (if then the value of SOF Counter is 2E0EH,why not E0H to form a 1-ms SOF ?? ) A2:2: Register 0x0E should be 0xE0 and register 0x0F should be 0xAE for full-speed and 0xEE for low-speed (master mode, swap D+/-, bit 5, 3,2,1 all high for upper bits of SOF counter). "To set up for 1-ms SOF time: The register 0FH contains the upper 6 bits of the SOF timer. Register 0EH contains the lower 8 bits of the SOF timer. The timer is based on a 12-MHz clock and uses a counter, which counts down to zero from an initial value. To set the timer for 1ms time, the register 0EH should be loaded with value E0H, register 0F, Bits 0 |
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沙发#
发布于:2004-08-07 10:17
顶,看来资料更新,还是非常重要的啊~~ :o
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