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关于进入64BIT LONG MODE的问题
写了个例子从软盘启动进入64BIT 的LONG MODE 的COMPATIABLE MODE下
可老是重启,大家看看可能会是什么问题??? bits 16 org 0x7c00 jmp Main ; ---------------------------------------------------------------------------------------------- BootDrive db 0x00 ; ---------------------------------------------------------------------------------------------- GDT_Tables: GDT_Null: Null_Discriptor1 dd 0x00 Null_Discriptor2 dd 0x00 GDT_CodeSegment_Address equ $-GDT_Tables GDT_CodeSegment: dw 0xffff dw 0x0000 db 0x00 db 10011010b db 11001111b db 0x00 GDT_DataSegment_Address equ $-GDT_Tables GDT_DataSegment: dw 0xffff dw 0x0000 db 0x00 db 10010010b db 11001111b db 0x00 GDT64_CodeSegment_Address_Temp equ $-GDT_Tables GDT64_CodeSegment_Temp: dd 0x0000 db 0x00 db 10011010b db 00100000b db 0x00 GDT_End: GDT_Address: dw GDT_End-GDT_Tables-1 dd GDT_Tables IDT_Address: IDT_Address_Limit dw IDT_End-IDT_Tables-1 IDT_Address_Base dd IDT_Tables IDT_Tables: IDT_Discriptor: IDT_TargetCodeSegmentOffset1 dw 0x0000 IDT_TargetCodeSegmentSelector dw 0x0000 IDT_Attribute dw 0x0e00 IDT_TargetCodeSegmentOffset2 dw 0x0000 IDT_End: ; -------------------------------------------------------------------------------------- Main: Get_Kernel: cli xor ax,ax mov ds, ax mov ss, ax mov sp, 0xffff Mask_All_IRQ: mov al,255 out 0xa1,al out 0x21,al Enable_A20: Enable_A20_First: in al,0x64 test al,2 jnz Enable_A20_First mov al,0xd1 out 0x64,al Enable_A20_Second: in al,0x64 test al,2 jnz Enable_A20_Second mov al,0xdf out 0x60,al cli cld lgdt [GDT_Address] lidt [IDT_Address] mov eax,0x11 mov cr0,eax jmp GDT_CodeSegment_Address:Code_32 [BITS 32] Code_32: mov ax,GDT_DataSegment_Address mov ds,ax mov es,ax mov ss,ax mov fs,ax mov gs,ax mov esp,0xffff ;jmp GDT_CodeSegment_Address:code32Main ; 跳入内核 ;code32Main: cld Store_4Kbyte_PML4E: mov edi,0x900000 ;PDPE base address. mov eax,0x910000 ;PDE base address. add eax,0x07 ;PDPE attribute. mov ecx,1 ;PDPE count. Store_512_4Kbytes_PML4E: stosd ;"add edi,0x04" is no need,because EDI is auto-add. ;add eax,0x08*0x1000 ;Pointer to next one. ;loop Store_512_4Kbytes_PDPE Store_4Kbyte_PDPE: mov edi,0x910000 ;PDPE base address. mov eax,0x920000 ;PDE base address. add eax,0x07 ;PDPE attribute. mov ecx,1 ;PDPE count. Store_512_4Kbytes_PDPE: stosd ;"add edi,0x04" is no need,because EDI is auto-add. ;add eax,0x08*0x1000 ;Pointer to next one. ;loop Store_512_4Kbytes_PDPE Store_4Kbyte_PDE: mov edi,0x920000 ;PDE base address. mov eax,0x930000 ;PTE base address. add eax,0x07 ;PDE attribute. mov ecx,511 ;PDE count. Store_512_4Kbytes_PDE: stosd ;add eax,0x08*0x1000 ;Pointer to next one. ;loop Store_512_4Kbytes_PDE Store_4Kbyte_PTE: mov edi,0x930000 ;PTE base address. mov eax,0x000000 ;Page base address. add eax,0x07 ;PTE attribute. mov ecx,511 ;PTE count. Store_512_4Kbytes_PTE: stosd add edi,0x04 ;PDE of 4K-bytes page PAE is 64-bits(8bytes). add eax,0x1000 ;Pointer to next one. loop Store_512_4Kbytes_PTE ; Enable the 64-bit page-translation-table entries by ; setting CR4.PAE=1 (this is _required_ before activating ; long mode). Paging is not enabled until after long mode ; is enabled. mov eax,cr4 bts eax,5 mov cr4,eax ; ; Create the long-mode page tables, and initialize the ; 64-bit CR3 (page-table base address) to point to the base ; of the PML4 page table. The PML4 page table must be located ; below 4 Gbytes because only 32 bits of CR3 are loaded when ; the processor is not in 64-bit mode. mov eax,0x900000 ; page directory location mov cr3,eax ; mov eax,cr0 ; Read CR0. ;or eax,0x80000000 ;mov cr0,eax ; enable page mov ecx,0xc0000080 ; EFER MSR number. rdmsr ; Read EFER. bts eax,8 ; Set LME=1. wrmsr ; Write EFER. ; Enable paging to activate long mode (set CR0.PG=1) ; mov eax, cr0 ; Read CR0. bts eax, 31 ; Set PE=1. mov cr0, eax ; Write CR0. jmp GDT64_CodeSegment_Address_Temp:pb32 bits 64 pb32: ;mov al,0x30 ;call Hex2ASCII ;mov [0xb8000],al sti jmp $ |
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沙发#
发布于:2005-02-16 17:03
老大,给我个64位的CPU吧
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板凳#
发布于:2005-02-17 09:38
哎,可惜我对Assemble不熟悉,帮不了忙啊。
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