总是说我DATA has multiple sourse? 高阻态有其他方法实现吗？

LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
ENTITY mux64 IS
PORT(
CT:IN STD_LOGIC_VECTOR(63 DOWNTO 0);
DATA:OUT STD_LOGIC_VECTOR(7 DOWNTO 0);
A2,A1,A0:IN STD_LOGIC
);
END mux64;
ARCHITECTURE bhv OF mux64 IS
SIGNAL C:STD_LOGIC_VECTOR(63 DOWNTO 0);
SIGNAL D:STD_LOGIC_VECTOR(2 DOWNTO 0);

BEGIN
   C<=CT;
D<=A2&A1&A0;

 --从最低位开始读
DATA<=C(7 DOWNTO 0) WHEN D="000" ELSE(OTHERS=>'Z');
DATA<=C(15 DOWNTO 8) WHEN D="001" ELSE(OTHERS=>'Z');
DATA<=C(23 DOWNTO 16) WHEN D="010" ELSE(OTHERS=>'Z');
DATA<=C(31 DOWNTO 24) WHEN D="011" ELSE(OTHERS=>'Z');
DATA<=C(39 DOWNTO 32) WHEN D="100" ELSE(OTHERS=>'Z');
DATA<=C(47 DOWNTO 40) WHEN D="101" ELSE(OTHERS=>'Z');
DATA<=C(55 DOWNTO 48) WHEN D="110" ELSE(OTHERS=>'Z');
DATA<=C(63 DOWNTO 56) WHEN D="111" ELSE(OTHERS=>'Z');
END bhv;

8通道总线，从64根中选出8根输出。开始用process加case语句实现，可是没有高阻态。
DATA<=C(63 DOWNTO 56) WHEN D="111" ELSE(OTHERS=>'Z');
中的OTHERS=>'Z'是那些为Z啊，总线吗？
不知道又没更好的方法，那位大侠指点一下：）

DATA<=C(63 DOWNTO 56) WHEN D="111" ELSE(OTHERS=>'Z');


如果该数为其他，到这里是不是都变高阻了呢？